Siltronic AG reports 2025 results worldwide; 1.35B EUR sales, 23.5% EBITDA margin

© Siltronic AG SILTRONIC AT A GLANCE 2 Investor Presentation - April 2026 4,300 employees worldwide 4 world-class production sites Supplier to top semiconductor producers 50+ years of history in silicon technologies 1.35 billion EUR sales in 2025 23.5 percent EBITDA margin in 2025 © Siltronic AG

© Siltronic AG 50+ YEARS OF HISTORY – A STORY OF SUCCESS AND INNOVATION 3 Investor Presentation - April 2026 1978 Foundation of Wacker Siltronic Corporation Portland (US) 1997 Foundation of Wacker Siltronic Singapore Pte. Ltd (“SSP”) 2016 Inauguration of new crystal pulling hall in Freiberg 2019 Inauguration of the new crystal pulling hall in Singapore 2023 Inauguration of crystal pulling hall extension in Freiberg 1968 Foundation of Wacker- Chemitronic GmbH 1995 Acquisition of Freiberg fab 2006 Foundation of 50:50 JV with Samsung (“SSW”) and construction start of a 300 mm fab 2014 Increase stake in SSW to 78 percent 2021 Groundbreaking of new fab in Singapore & expansion of crystal pulling hall in Freiberg 1984 First 200 mm wafers at Wacker- Chemitronic 1990 First research and development projects for 300 mm wafers 2015 Siltronic executes successful IPO 1999 Start of 200 mm production at Siltronic fab Singapore Pte Ltd. 2024 Inauguration of the new fab in Singapore 2004 Siltronic opens new 300 mm fab in Freiberg

© Siltronic AG OUR INTERNATIONAL PRODUCTION NETWORK SERVES CUSTOMERS AROUND THE GLOBE 4 Investor Presentation - April 2026 JV with Samsung Electronics Leading Edge production R&D hub in Burghausen 300 mm volume production in Germany & Singapore USA (Portland / Oregon) Singapore Germany (Burghausen, Freiberg) Singapore Germany USA SSW SSP CP 300 mm 200 mm 300 mm CP 200 mm JV = Joint Venture CP = Crystal Pulling R&D = Research and Development

© Siltronic AG Source: TechInsights & other companies, WSTS (Silicon based), SEMI SMG, Siltronic Marketing THE WAFER SUPPLIERS ARE FUELING THE WHOLE ELECTRONICS VALUE CHAIN 5 Investor Presentation - April 2026 Electronics value chain (figures for 2025) End markets USD >5,000 bn Semiconductor device makers USD 786 bn Silicon for electronic applications USD 1.4 bn With fabs Samsung, Infineon, TSMC, Intel, Micron, SK Hynix… Design only Nvidia, AMD, Qualcomm… Smartphones Apple, Samsung… PCs Lenovo, HP, Dell… Industrials Siemens, GE… Servers / AI Microsoft, Google, AWS, Meta… Automotive Toyota, VW, BMW, Tesla… Others e.g. White goods, Infrastructure, Gaming… 5 major suppliers 5 major suppliers

1,300 fabs and roughly 50 larger chip designers 10,000 companies Semiconductor silicon wafers USD 11.4 bn Wacker Chemie, Hemlock, OCI, Tokuyama, Mitsubishi

© Siltronic AG SILTRONIC IS WELL POSITIONED AS THE ONLY WESTERN-BASED WAFER MANUFACTURER 6 Investor Presentation - April 2026 Only western based wafer manufacturer Around 75% of the market is served by the Top 5 wafer manufacturers SK Siltron Shin Etsu Sumco Global Wafers Top 5 Wafer manufacturers Source: Q1 – Q3 2025 Quarterly revenue reports by SEMI reporting companies with Siltronic estimates on silicon wafer revenues

© Siltronic AG WAFER DEMAND GROWTH EXPECTED TO CONTINUE (CAGR1 5-6%), DRIVER: 300 mm WAFERS 7 Investor Presentation - April 2026 Source: Siltronic estimates; 1CAGR = Compound Annual Growth Rate (2000-2025) CAGR 1% for 200 mm CAGR 6% for 300 mm Wafer Demand per Diameter in mn 300 mm equivalents

© Siltronic AG 2026 OUTLOOK: ~7% YOY GROWTH (PRE-INVENTORY) DRIVEN BY STRONG SERVER DEMAND 8 Investor Presentation - April 2026 ¹Infrastructure Telecommunications, game consoles, consumer electronics such as televisions, white goods such as refrigerators Source: Siltronic estimates as of April 2026; Chart not to scale Growth in Wafer Area Consumption, in % yoy Cars with reduced growth rate Smartphones & PCs demand weakened further, while memory allocation favors servers Split wafer consumption by end use in 2025 Smartphones Servers Automotive PCs Industry Others1 2026e -10% 44% 3% -10% 10% 3% 7% Total w/o inventory 21% 18% 16% 14% 13% 18% 100% 2025 3% 30% 18% 12% 2% 3% 8% Industry improving Inventory impact on wafer demand

© Siltronic AG 6 – 7% DRAM CHIP REVENUE CURRENTLY DE-COUPLED FROM WAFER DEMAND 9 Investor Presentation - April 2026 Source: Siltronic-estimates based on press statements Chart not to scale ~ 6-7% DRAM wafer demand arrives at wafer industry Tight customer DRAM capacity caps volume growth Supply shortage pushes memory pricing up Customer DRAM capacity limited DRAM Chip revenue Volume Bit-growth Price / mix effects Wafer starts Bit per wafer area Inventory burn Wafer demand 100% Expected DRAM Growth 2026 yoy – from sales to wafer volume

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© Siltronic AG SILTRONIC HAS A WELL-DIVERSIFIED AND RESILIENT PRODUCT MIX IN ALL THREE SEMI-SEGMENTS 10 Investor Presentation - April 2026 Source: Siltronic Marketing Power Leading position Leading Edge Supplier Demand by segments in % of total demand in 2025 26% 37% 37% Market Memory Logic Power/Others

© Siltronic AG MEGATRENDS WILL DRIVE WAFER DEMAND 11 Investor Presentation - April 2026 Key benefits from strategic focus on Leading Edge and Power market All segments will participate and Power with over- proportional growth Siltronic is well positioned to support each megatrend Artificial Intelligence Digitalization Renewables Industry 4.0 Autonomous vehicles & Electromobility Security

© Siltronic AG LTA = Long Term Agreement; epi = epitaxial wafers (mostly used for the Logic industry) NEW 300 mm FAB IN SINGAPORE 12 Investor Presentation - April 2026 Facts Up to 80% LTA share with high prepayments Key prime customer qualifications completed in July 2025 First time 300 mm epi in Singapore EUR 2 billion capex until 2024, from 2025 clearly reduced EBITDA margin above 50%+ mid-term 2024, 2025 and 2026 with reduced ramp speed Highly automated and high economies of scale

© Siltronic AG IN FREIBERG WE FURTHER IMPROVED PRODUCT MIX FUELED BY INVESTMENTS 13 Investor Presentation - April 2026 Source: Siltronic; Silicon Saxony/Wirtschaftsförderung Sachsen First-class geographical position in light of EU ambitions Investments of more than EUR 1 bn since 1995 by Siltronic Every 2nd to 3rd semiconductor in the EU is from this region Chemnitz Dresden Leipzig Bosch Infineon TSMC GlobalFoundries NXP 1 cm = 28.25 km

© Siltronic AG STRONG FOCUS ON GROWTH DRIVERS R&D AND INNOVATION 15 Investor Presentation - April 2026 R&D hub in Burghausen 450 R&D employees 1,900 patents 5-6% of sales planned as R&D spendings R&D Innovation Strategy o Stay one generation ahead as a Technology Leader o Focus on Leading Edge and Power o Find new business opportunities and expand our product portfolio Partnering with leading innovation platforms +

© Siltronic AG 2002 65 nm 2005 65 nm 2007 45 nm 2009 32 nm 2011 22 nm 2013 8 nm 2016 10 nm 2018 8 nm 2020 5 nm 2022 3 nm 2024 2 nm 2026 A14 SILTRONIC HAS A PROVEN TRACK RECORD AS A TECHNOLOGY LEADER 16 Investor Presentation - April 2026 Commercialization R&D Start 2004 45 nm 2006 32 nm 2008 22 nm 2009 16 nm 2012 10 nm 2014 16 nm 2016 5 nm 2019 3 nm 2021 2 nm 2023 A14 2025 A10

© Siltronic AG 18 Investor Presentation - April 2026 nm = nanometer PURITY AND FLATNESS REQUIREMENTS FOR WAFERS ARE EXTREME, AS SCALING THEM INTO THE MACRO WORLD SHOWS Particles Particle size specified in the nm range. Requirements are equivalent to a maximum of 10 grains of sand distributed over the city of Munich. Flatness 20 nm on a wafer are equivalent to the height of a leaf on the surface of Lake Chiemsee – or a single bacteria on a tennis court.

© Siltronic AG DEBT REPAYMENTS STARTED IN 2025, WITH AN ADDITIONAL EUR 100 MN PLANNED FOR 2026 20 Investor Presentation - April 2026 Figures rounded SSD = Schuldscheindarlehen (Promissory Note Loan) Debt Financing Instruments in EUR million Interest expenses in the ballpark of EUR 50 mn in 2026 Prepayments of EUR ~15 mn expected to be refunded in 2026 -936 Variable loans, drawn Syn loan, not drawn yet Fixed loans, drawn SGP 260 EIB 175 SSD 280 SSD 390 Syn loan 253 Syn loan 127 1,485 Maturity Profile of Debt Financing in EUR million Liquidity in EUR million March 31, 2026 448 Syn loan (not drawn) 127 2026 2027 2028 ∑ 2029 – 2033 100 250 220 790

© Siltronic AG 21 Investor Presentation - April 2026 CONTINUING TO FOCUS ON CAPEX, COSTS AND CASH Strict Capex Discipline Other Cash Measures Deferred capacity spend, restrictive project approvals Full-scope cost management, tackling all cost drivers Particularly comprehensive working capital management © Siltronic AG Cost Program Major cost items 2026 Depreciation Labor Supplies Polysilicon Energy

© Siltronic AG CAPEX SIGNIFICANTLY DOWN, PAYMENTS FOR CAPEX ABOVE INVEST-LEVEL 22 Investor Presentation - April 2026 Chart not to scale Capex and Payments for Capex, in EUR million Payment roll-over effects occurred in Q1 2026 Capital expenditures Payments for capital expenditures, gross 1,074 923 2022 1,199 1,316 2023 700 523 2024 380 369 2025 Q1 2026 48 110 180-220 2026e

© Siltronic AG EPIC Supplier Award Intel, April 2025 Best Supplier Award SSMC, September 2025 BEST in Value Award Samsung, September 2025 Outstanding Supplier Performance Award Micron, November 2025 SILTRONIC’S TECHNOLOGICAL LEADERSHIP AND EXCELLENCE RECOGNIZED WITH MULTIPLE AWARDS IN THE LAST 12 MONTHS 23 Investor Presentation - April 2026 Best Silicon Supplier Award ST, November 2025

© Siltronic AG 2026 GUIDANCE CONFIRMED 24 Investor Presentation - April 2026 Sales Mid-single digit below 2025 EUR/USD 1.18 EBITDA margin Between 20% and 24% Capex Between EUR 180 and 220 mn EBIT Significantly below the previous year Depreciation Between EUR 490 and 520 mn Net Cash Flow In the range of the previous year © Siltronic AG © Siltronic AG

© Siltronic AG 26 Investor Presentation - April 2026 SILTRONIC IS ENABLING TECHNOLOGIES FOR A SUSTAINABLE FUTURE Power focus Leading Edge focus R&D focus is crucial for sustainability strategy Investments needed to keep our equipment state of the art for Leading Edge wafers Strategy on Leading Edge and Power wafers supports sustainability strategy New chip generations increase energy efficiency and need less power Focus on Power wafers + R&D focus in special products and new materials Leading Edge wafers + R&D focus on new Design Rules Power chips are crucial for decarbonization and enable renewable energies and EV’s

© Siltronic AG ¹Absolute reduction, base year 2021; ²Net zero: GHG emissions released into the atmosphere equal the amount removed; ³Based on RE100 criteria AMBITIOUS TARGETS AND GLOBAL COMMITMENTS KEEP US GOING 27 Investor Presentation - April 2026 Climate – Scope 1+2 CO2 emissions 2030: -42%1 2045: Net zero2 Status 2025: -31%1 Energy – renewable 2030: 60% share 2045: 100% share Status 2025: 26% share3 Siltronic supports the 10 principles of the UN Global Compact. We contribute to the sustainable development goals of the United Nations. As a supplier to the electronics industry, Siltronic is a “Regular” member of the Responsible Business Alliance (RBA). Siltronic achieved an ‘A – Leadership’ score in CDP Climate change and Water security ratings. With our membership at RE100, we are dedicated to make our contribution to global decarbonization.

© Siltronic AG SUSTAINABILITY HIGHLIGHTS 2025 28 Investor Presentation - April 2026